# give a simple string (no spaces) name for your plugin that will be used in the RLI
NAME=shaper++

# list all your source files here
SRCS=shaper++.c

# there are 5 important directives that affect how your plugin will run:
#  - DL_ORDERED: include this if you want your threads to use standard packet ordering techniques
#  - FIRST_PACKET_THREAD=N: 0<=N<=7 is the first thread that handles packets
#  - LAST_PACKET_THREAD=N: 0<=N<=7 is the last thread that handles packets
#  - MESSAGE_THREAD=N: 0<=N<=7 is the one thread that handles control messages (optional)
#  - CALLBACK_THREAD=N: 0<=N<=7 is the one thread that handles callbacks (optional)
# note: FIRST_PACKET_THREAD and LAST_PACKET_THREAD together set the range of threads that will
# handle packets. the MESSAGE_THREAD (if any) and CALLBACK_THREAD must not lie in that range.
DIRECTIVES=-DDL_ORDERED -DFIRST_PACKET_THREAD=0 -DLAST_PACKET_THREAD=0 -DMESSAGE_THREAD=6 -DCALLBACK_THREAD=7

# set spill based on your spilling needs
#   8 = spill to Local Memory then SRAM
#   7 = no spill
#   6 = spill to SRAM only
#   5 = spill to Local Memory then Next Neighbor regs
#   4 = spill to Next Neighbor regs then Local Memory
#   3 = spill to Local Memory only
#   2 = spill to Next Neighbor regs only
#   1 = spill to Next Neighbor regs then Local Memory then SRAM
#   0 = spill to Local Memory then Next Neighbor regs then SRAM
# note: if NN_MODE is not 1 (see below), then spilling will not occur to the NN regs
SPILL=1
#SPILL=5
#SPILL=0

# set number of hardware contexts
#   8 = use 8 hardware thread contexts
#   4 = use 4 hardware thread contexts
# note: the tradeoff is that setting this to 4 only lets you use 4 threads in your
# plugin, but each thread will get twice as many registers to use.
NUM_CTXS=8

# set operation mode for Next Neigher registers
#   0 = use them for communication with ME neighbors
#   1 = use them only on the local ME
NN_MODE=0

# don't modify anything below here unless you know what you are doing

NPRBASE=/users/onl/npr

CC=${NPRBASE}/intel_sdk/bin/icl
LD=${NPRBASE}/intel_sdk/bin/ucld

PF=${NPRBASE}/pluginFramework
MEC=${NPRBASE}/intel_sdk/microengineC
ONLSRC=${NPRBASE}/onl_router/src
ONLDL=${NPRBASE}/onl_router/dispatch_loop
ONLLIB=${NPRBASE}/onl_router/library
BOOK=${NPRBASE}/IXP2XXX_book
INTELLIB=${NPRBASE}/intel_sdk/src

#LMINFO=-Qperfinfo=16
#LIVEINFO=-Qliveinfo
#DB=-DDEBUG1
#MODE=-DTEST_MODE

CFLAGS=-DMICRO_C ${DIRECTIVES} -O2 -Ob1 -W3 ${LMINFO} ${LIVEINFO} ${DB} ${MODE}

IXPFLAGS_2805=-Gx2805 -Qrevision_min=48
IXPFLAGS_2800=-Gx2800 -Qrevision_min=17

MEFLAGS=-Qbigendian -Qspill=${SPILL} -Qnctx_mode=${NUM_CTXS} -Qnn_mode=${NN_MODE} -Qlm_start=0 -Qdefault_sr_channel=3
#MEFLAGS=-Qbigendian -Qnctx=8 -Qspill=${SPILL} -Qnctx_mode=8 -Qnn_mode=0 -Qlm_start=0 -Qdefault_sr_channel=3
#MEDEBUG=-Zi

INCLUDES=-I${NPRBASE}/include -I${ONLSRC} -I${ONLDL} -I${ONLLIB} -I${INTELLIB}/include -I${INTELLIB}/library/dataplane_library/microC -I${INTELLIB}/library/microblocks_library/microc -I${MEC}/include -I${BOOK}/Chapter05 -I${BOOK}/Chapter09 -I${PF} -I.

### 5 MEs: 0-4
###
LDFLAGS0=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x00706000:0x00032000
LDFLAGS1=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x00738000:0x00032000
LDFLAGS2=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x0076A000:0x00032000
LDFLAGS3=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x0079C000:0x00032000
LDFLAGS4=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x007CE000:0x00032000

### 1 ME
LDFLAGS=-g -p -f -sc 0x00003000:0x00001000 -dr 0x00000000:0x00000000 -sr0 0x00000000:0x00000000 -sr1 0x00000000:0x00000000 -sr2 0x00000000:0x00000000 -sr3 0x00706000:0x000FA000

#SRC=${MEC}/src/intrinsic.c ${MEC}/src/libc.c ${MEC}/src/rtl.c ${SRCS} ${ONLLIB}/counter_util.c ${PF}/plugin_dl.c ${PF}/plugin_api.c ${ONLSRC}/scratch_rings_WU.c ${ONLSRC}/sram_rings_WU.c
###SRC=${MEC}/src/intrinsic.c ${MEC}/src/libc.c ${MEC}/src/rtl.c ${SRCS} ${ONLLIB}/counter_util.c ${PF}/plugin_dl.c ${ONLSRC}/scratch_rings_WU.c ${ONLSRC}/sram_rings_WU.c
### reordered previous line to avoid compiler error about dl_sink()/plugin_dl.c
SRC=${MEC}/src/intrinsic.c ${MEC}/src/libc.c ${MEC}/src/rtl.c ${ONLLIB}/counter_util.c ${PF}/plugin_dl.c ${ONLSRC}/scratch_rings_WU.c ${ONLSRC}/sram_rings_WU.c ${SRCS}

OBJDIR=list
UOFDIR=uof

LIST=${NAME}.list
LIST_2800=${LIST}_2800
LIST_2805=${LIST}_2805

UOF=${NAME}.uof
UOF_PME0_2800=${UOF}_0_2800
UOF_PME1_2800=${UOF}_1_2800
UOF_PME2_2800=${UOF}_2_2800
UOF_PME3_2800=${UOF}_3_2800
UOF_PME4_2800=${UOF}_4_2800
UOF_PME0_2805=${UOF}_0_2805
UOF_PME1_2805=${UOF}_1_2805
UOF_PME2_2805=${UOF}_2_2805
UOF_PME3_2805=${UOF}_3_2805
UOF_PME4_2805=${UOF}_4_2805

all: ${UOF_PME0_2800} ${UOF_PME1_2800} ${UOF_PME2_2800} ${UOF_PME3_2800} ${UOF_PME4_2800} ${UOF_PME0_2805} ${UOF_PME1_2805} ${UOF_PME2_2805} ${UOF_PME3_2805} ${UOF_PME4_2805} ${UOF}

${OBJDIR}:
	mkdir -p list

${UOFDIR}:
	mkdir -p uof

${UOF}: ${UOFDIR}
	touch ${UOFDIR}/${UOF}

${OBJDIR}/${LIST_2800}: ${OBJDIR}
	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
	mv ${OBJDIR}/${LIST} ${OBJDIR}/${LIST_2800}

${UOF_PME0_2800}: ${UOFDIR} ${OBJDIR}/${LIST_2800}
	${LD} -u 7 -l ${OBJDIR}/${LIST_2800} ${LDFLAGS0} -o ${UOFDIR}/${UOF_PME0_2800}

${UOF_PME1_2800}: ${UOFDIR} ${OBJDIR}/${LIST_2800}
	${LD} -u 16 -l ${OBJDIR}/${LIST_2800} ${LDFLAGS1} -o ${UOFDIR}/${UOF_PME1_2800}

${UOF_PME2_2800}: ${UOFDIR} ${OBJDIR}/${LIST_2800}
	${LD} -u 17 -l ${OBJDIR}/${LIST_2800} ${LDFLAGS2} -o ${UOFDIR}/${UOF_PME2_2800}

${UOF_PME3_2800}: ${UOFDIR} ${OBJDIR}/${LIST_2800}
	${LD} -u 18 -l ${OBJDIR}/${LIST_2800} ${LDFLAGS3} -o ${UOFDIR}/${UOF_PME3_2800}

${UOF_PME4_2800}: ${UOFDIR} ${OBJDIR}/${LIST_2800}
	${LD} -u 19 -l ${OBJDIR}/${LIST_2800} ${LDFLAGS4} -o ${UOFDIR}/${UOF_PME4_2800}

${OBJDIR}/${LIST_2805}: ${OBJDIR}
	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
	mv ${OBJDIR}/${LIST} ${OBJDIR}/${LIST_2805}

${UOF_PME0_2805}: ${UOFDIR} ${OBJDIR}/${LIST_2805}
	${LD} -u 7 -l ${OBJDIR}/${LIST_2805} ${LDFLAGS0} -o ${UOFDIR}/${UOF_PME0_2805}

${UOF_PME1_2805}: ${UOFDIR} ${OBJDIR}/${LIST_2805}
	${LD} -u 16 -l ${OBJDIR}/${LIST_2805} ${LDFLAGS1} -o ${UOFDIR}/${UOF_PME1_2805}

${UOF_PME2_2805}: ${UOFDIR} ${OBJDIR}/${LIST_2805}
	${LD} -u 17 -l ${OBJDIR}/${LIST_2805} ${LDFLAGS2} -o ${UOFDIR}/${UOF_PME2_2805}

${UOF_PME3_2805}: ${UOFDIR} ${OBJDIR}/${LIST_2805}
	${LD} -u 18 -l ${OBJDIR}/${LIST_2805} ${LDFLAGS3} -o ${UOFDIR}/${UOF_PME3_2805}

${UOF_PME4_2805}: ${UOFDIR} ${OBJDIR}/${LIST_2805}
	${LD} -u 19 -l ${OBJDIR}/${LIST_2805} ${LDFLAGS4} -o ${UOFDIR}/${UOF_PME4_2805}

#${UOF_PME0_2800}: ${OBJDIR} ${UOFDIR} 
#	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 7 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME0_2800}
#
#${UOF_PME1_2800}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 16 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME1_2800}
#
#${UOF_PME2_2800}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 17 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME2_2800}
#
#${UOF_PME3_2800}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 18 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME3_2800}
#
#${UOF_PME4_2800}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2800} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 19 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME4_2800}
#
#${UOF_PME0_2805}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 7 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME0_2805}
#
#${UOF_PME1_2805}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 16 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME1_2805}
#
#${UOF_PME2_2805}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 17 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME2_2805}
#
#${UOF_PME3_2805}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 18 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME3_2805}
#
#${UOF_PME4_2805}: ${OBJDIR} ${UOFDIR}
#	${CC} ${IXPFLAGS_2805} ${SRC} ${CFLAGS} ${INCLUDES} ${MEFLAGS} ${MEDEBUG} -Fo${OBJDIR}/ -Fe${OBJDIR}/${LIST}
#	${LD} -u 19 -l ${OBJDIR}/${LIST} ${LDFLAGS} -o ${UOFDIR}/${UOF_PME4_2805}
#
clean:
	rm -rf ${OBJDIR}/* ${UOFDIR}/* *.ind =DEBUG-MODE

.PHONY:	debug
debug:
	make CFLAGS="$(CFLAGS) -DDEBUG"; touch =DEBUG-MODE