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Real-Time Displays, Router Plugins and Much Much More !!!
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The Open Network Laboratory is a resource for the networking research
community, designed to enable experimental evaluation of advanced networking
concepts in a realistic working environment.
It is supported by a grant from the National Science Foundation
(CNS 0230826).
The laboratory is built around a set of open-source,
extensible, high performance routers that have been developed at
Washington University, and which can be accesses by remote
users through a Remote Laboratory Interface (RLI).
The RLI allows users to configure the testbed network,
run applications and monitor those running applications using the
built-in data gathering mechanisms that the routers provide.
The RLI will also allow users to extend, modify or replace the
software running in the routers' embedded processors and to
similarly extend, modify or replace the routers' hardware,
which is implemented largely using Field Programmable Gate Arrays,
which can be dynamically reconfigured to support new capabilities.
The RLI provides support for data visualization and real-time remote
displays, allowing users to develop the insights needed to
understand the behavior of new capabilities within a complex
operating environment. The routers to be included in the testbed
are built around a scalable switch fabric and are architecturally
similar to high performance commercial routers. This enables
researchers working in this environment to evaluate their ideas
in a much more realistic context than can be provided by PC-based
routers using commodity hardware, and operating systems tailored
to the needs of desktop computing.
Researchers seeking to transfer
their ideas to commercial practice need to be able to demonstrate
those ideas in a realistic setting. The Open Network Laboratory
provides such a setting, allowing systems researchers to evaluate
and refine their ideas, and then to demonstrate them to those
interested in moving the technology into new products and services.
The physical configuration of the ONL is shown to the right. The facility is built around four extensible gigabit routers, with eight ports. These can be linked together in a variety of network topologies, using a central Virtual Network Switch (VNS), which serves as an electronic patch panel. The facility also includes 36 computers, which serve as end systems and control processors for the extensible routers. Some of these are connected to their routers through gigabit Ethernet subnetworks and others are connected to the VNS, to allow flexible connection of hosts to routers. Each router has four of its eight ports connected to the VNS, to provide maximum flexiblity for network configuration.
The figure below shows a mock-up of the user interface.
New configurations can be built by instantiating routers and
hosts and connecting them together graphically.
Routing tables can configured through pull-down menus
accessed by clicking on router ports.
Packet filters and custom software plugins can
be specified in much the same way.
Once a configuration has been created, it can be saved to a file
for later use. When a user is conducting an experiment, the
configuration is submitted to the ONL management server,
which generates the low level control messages to configure
the various system components to realize the specified
configuration.
The graphical interface also serves as a control mechanism,
allowing access to various hardware and software control variables
and traffic counters.
The counters can be used to generate
charts of traffic rates, or queue lengths as a function of time,
to allow users to observe what happens at various points in the
network during during their experiment and to allow them to
document the results of the experiment for presentation
and publication.
An example of such a chart (with additional annotations)
is shown at right.
The extensible router used in the ONL is built around a gigabit
ATM switch core, which has been augmented with additional
components to perform routine packet processing and
special processing to implement advanced network services.
A block diagram of the router appears at right.
The ATM switch core consists of an eight port switch fabric
surrounded by Input Port Processors (IPP)
and Output Port Processors (OPP).
The IPPs include virtual circuit routing tables and the
OPPs provide a modest amount of cell buffering.
The Field Programmable Port Extender (FPX) is an add-on card that is used to provide routine packet processing functions. These functions include IP route lookup, packet classification and large capacity packet buffers. The FPX also implements a distributed scheduling mechanism to regulate the flow of traffic through the ATM switch core so as to avoid overloads that can otherwise occur, due to the unpredictable nature of internet traffic. The FPX logic is implemented using a large Field Programmable Gate Array (FPGA) and the logic is specified as open-source VHDL that can be modified by ONL users to extend the functionality or to experiment with alternative implementations of its various packet processing elements.
The Smart Port Card contains an embedded processor subsystem with a Pentium III processor running a modified version of the Net-BSD operating system. The modifications include a highly streamlined packet forwarding path and a Plugin Environment that can host user-specified software plugins to implement a variety of system extensions. Selected packets are directed through the SPC through the installation of suitable packet filters in the FPX. The SPC delivers the packets to the specified plugins which process the packets and may modify them before sending them back to the SPC. The system also provides for just the headers of selected packets to be forwarded to the SPC and allows the SPC to determine how the packet should be handled.
The system uses two different types of Line Cards.
Gigabit Ethernet Line Cards are provided for connection to
gigabit Ethernet subnets and hosts with gigabit Ethernet
NICs.
Gigabit ATM line cards are used to connect to the
Virtual Network Switch and to hosts using compatible
ATM NICs. These ATM NICs have a variety of features
enabling high bandwidth data transfers directly to
applications running on hosts and are particularly
useful for generating high volume traffic for network
experiments.
A photograph of the extensible router is shown at right. The ATM switch core occupies a large printed circuit board at the bottom of the enclosure. An FPX, SPC and line card is then stacked on top of the main board for each of the eight ports. In the photograph, only the line cards are visible at the top of the stacks. Fiber optic jumpers are provided inside the enclosure to connect the line cards to the back side of the front panel, where the external connectors are located.
Early versions of the sofware have been used within our laboratory, and we expect to start making the lab available to users by early 2005.
Prepared by Jonathan Turner: Jon.Turner at wustl.edu, and Updated by Ken Wong, 3/8/2005.